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Table C- 2

A simplified truth table for the control circuit PROM.

C-1 7474 datasheet



Semiconductor Components Industries, LLC, 1999

December, 1999 – Rev. 6

1 Publication Order Number:

SN74LS74A/D

___ ____

____ _____ ________

_____________ _________

The SN74LS74A dual edge-triggered flip-flop utilizes Schottky

TTL circuitry to produce high speed D-type flip-flops. Each flip-flop

has individual clear and set inputs, and also complementary Q and Q

outputs.

Information at input D is transferred to the Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a

voltage level of the clock pulse and is not directly related to the

transition time of the positive-going pulse. When the clock input is at

either the HIGH or the LOW level, the D input signal has no effect.

MODE SELECT – TRUTH TABLE

OPERATING MODE

INPUTS OUTPUTS

SD SD D Q Q

Set

Reset (Clear)

*Undetermined

Load “1” (Set)

Load “0” (Reset)

Q0 Q1 Q2 Arm Disarm Counter Accelerometer D0 D1 D2 Counter Enable Counter Reset Alarm Enable Accelerometer Reset

0 0 0 X X X X 1 0 0 0 1 0 0

1 0 0 0 X X X 1 0 0 0 1 0 0

1 0 0 1 0 X X 0 1 0 0 1 0 0

1 1 X X X X X 1 0 0 0 1 0 0

1 X 1 X X X X 1 0 0 0 1 0 0

0 1 0 X 0 X 0 0 1 0 0 0 0 1

0 1 0 X 1 X X 1 0 0 0 0 0 1

0 1 0 X 0 X 1 0 0 1 0 0 0 1

0 0 1 0 0 0 X 0 0 1 1 1 1 0

0 0 1 0 0 1 X 0 1 0 1 1 1 0

0 0 1 1 0 X X 0 1 0 1 1 1 0

0 0 1 X 1 X X 1 0 0 1 1 1 0

Inputs

Outputs

1 2 ... 49 50 51 52 53 54 55 56 57 58 59 ... 85 86

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